Design Verification Engineer
Company: VirtualVocations
Location: El Cajon
Posted on: January 24, 2025
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Job Description:
A company is looking for a Senior Design Verification
Engineer.
Key Responsibilities
Develop and simulate test cases for SOC verification using System
Verilog and C
Perform debugging of issues and failures using standard tools and
methodologies
Conduct specific verification tasks including dynamic CDC
verification and clock sweep tests
Required Qualifications
Experience with System Verilog and UVM, with a focus on C
Understanding of ARM processor-based SOCs and AXI/AHB protocols
Strong hands-on experience with test development and EDA tools
Proven debugging skills with a logical approach to
problem-solving
Familiarity with dynamic frequency scaling and complex reset
architectures is a plus
Keywords: VirtualVocations, El Centro , Design Verification Engineer, Engineering , El Cajon, California
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